The present invention relates to a printed circuit board designing method to efficiently suppress radiation which may occur on printed circuit boards and, more particularly, to a printed circuit board where such radiation is suppressed.
Generally, a printed circuit board on which power line patterns and ground line patterns are formed often has a multi-layer structure. Such multi-layer structured printed circuit board has power line patterns and ground line patterns in an inner layer, and has signal line patterns on a surface layer on which circuit parts are placed. On the other hand, a double-sided printed circuit board and a single-sided printed circuit board have power line patterns and ground line patterns in a space where signal line patterns are not formed.
Conventionally, as to power line patterns and ground line patterns formed on a printed circuit board, no special attention has been paid to the relation between the line patterns and signal frequencies which may become radiation noise sources. For this reason, the inductance of a layer where power line patterns are formed and that of a layer where ground line patterns are formed vary extremely, especially, the inductance of some portions is much higher than that of other portions. When direct current is passed through this high inductance portion, potential change occurs, resulting in high-level radiation. More specifically, when signals are transferred among active devices such as IC's and oscillators on the printed circuit board, current through the line patterns cause a magnetic field. Further, if conductors have impedance, potential difference due to the positional difference among the conductors cause an electric field. This magnetic field and electric field become plane waves and they are radiated to diffuse at remote points. The radiation noise affects the other signals, and causes problems such as reflection noise, crosstalk or delay in transfer of the other signals.
To prevent the ill effects caused by the radiation noise, resistors have been inserted in the patterns, or inductors and capacitors having frequency characteristics to cut off high frequency components have been inserted in the patterns. However, this addition of parts changes the design and increases costs.
For example, as shown in FIG. 1, Japanese Patent No. 1-47032 introduces a printed circuit board having a plurality of parallel ground lines 121 and a plurality of parallel power (e.g., Vcc) lines 122 on the rear surface, and having a plurality of parallel ground lines 131, orthogonal to the ground lines 121 and a plurality of parallel power lines 132, also orthogonal to the power lines 122, on the front surface. As shown in FIG. 2, the ground lines 121 on the rear surface are connected with the ground lines 131 on the front surface at the overlapping points via through holes 134. Also, the power lines 122 on the rear surface are connected with the power lines 132 on the front surface at the overlapping points via through holes 136. The power lines and the ground lines are connected with each other at a plurality of predetermined positions via capacitors for preventing noise. As it is apparent from FIG. 1, this printed circuit board has a plurality of through holes 150 in which lead pins of IC's are inserted to attach the IC devices on the circuit board. As shown in FIG. 2, upon attaching IC's, if an IC is a DIP (dual in-line package) type IC that has fourteen pins, the power pin (pin #14) is inserted into a through hole 110, and the ground pin (pin #7) of the adjacent IC is inserted into a through hole 111.
However, the inventors of the present application have tested this printed circuit board of the prior art and found that the circuit board cannot reduce the radiation noise level although the circuit board has a capacitor for noise prevention. They found that this is because the capacitor is connected to the power pin of an IC package and the ground pin of a diffecent IC package. It should be connected to the power and ground pins of an IC package.
The inventors have studied the phenomena and concluded that in this prior art, the grid arrangement of the ground lines and the power lines as shown in FIG. 1 is made corresponding to the lengths of the IC packages, i.e., the ground lines and the power lines are arranged in a grid so that the power pin and the ground pin of the DIP type IC (in a DIP type IC, these pins are at the both ends in the longitudinal direction) can be respectively inserted into the through holes 110 and 111. However, recent IC's have a high operation frequency, and when the power lines and the ground lines are arranged at spacings corresponding to the longitudinal lengths of the IC's, electromagnetic waves radiated from the signal lines or power lines have considerably high noise levels. The present inventors have found that the high-level electromagnetic waves cause erroneous operation of the circuit, or in other circuits on the board or other board.